In general, a liquid crystal display (LCD) device needs to have an inverter circuit installed therein, for converting an external direct current (DC) voltage into an alternating current (AC) voltage.
FIG. 2 is a circuit diagram of a conventional inverter circuit. The inverter circuit 1 includes a DC input terminal 10 connected to a DC power supply (not shown), a pulse width modulation (PWM) circuit 11, a first switch circuit 12, a second switch circuit 13, a first filter circuit 141, a second filter circuit 142, a first transformer 15, and a second transformer 16.
The PWM circuit 11 includes a first output port 111 and a second output port 112. The first output port 111 is used to output a first square wave signal, and the second output port 112 is used to output a second square wave signal. Phases of the two square wave signals are opposite.
The first switch circuit 12 includes a first transistor 121 and a second transistor 122. The transistors 121 and 122 are N-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs). A gate electrode of the first transistor 121 is connected to the first output port 111, and a source electrode of the first transistor 121 is connected to ground. A gate electrode of the second transistor 122 is connected to the first output port 111, and a source electrode of the second transistor 122 is connected to ground. A drain electrode of the second transistor 122 is connected to a drain electrode of the first transistor 121. In practice, the first switch circuit 12 is installed in a first chip (not shown).
The second switch circuit 13 includes a third transistor 131 and a fourth transistor 132. The transistors 131 and 132 are NMOSFETs. A gate electrode of the third transistor 131 is connected to the second output port 112, and a source electrode of the third transistor 131 is connected to ground. A gate electrode of the fourth transistor 132 is connected to the second output port 112, and a source electrode of the fourth transistor 132 is connected to ground. A drain electrode of the fourth transistor 132 is connected to a drain electrode of the third transistor 131. In practice, the second switch circuit 13 is installed in a second chip (not shown).
Each filter circuit 141 or 142 includes a resistor (not labeled) and a capacitor (not labeled). The resistor and the capacitor are connected in series.
The first transformer 15 includes a first primary winding 151, a second primary winding 152, and a first secondary winding 154. The first primary winding 151 and the second primary winding 152 share a first tap 153. The first tap 153 is connected to the DC input terminal 10. The first tap 153 is connected to ground via the first filter circuit 141. The other tap (not labeled) of the first primary winding 151 of the first transformer 15 is connected to the drain electrode of the first transistor 121. The other tap (not labeled) of the second primary winding 152 of the first transformer 15 is connected to a drain electrode of the third transistor 131. Two taps of the first secondary winding 154 are connected to a first load (not shown). The first load may for example be lamps.
The second transformer 16 includes a third primary winding 161, a fourth primary winding 162, and a second secondary winding 164. The third primary winding 161 and the fourth primary winding 162 share a second tap 163. The second tap 163 is connected to the DC input terminal 10. The second tap 163 is connected to ground via the second filter circuit 142. The other tap (not labeled) of the third primary winding 161 of the second transformer 16 is connected to the drain electrode of the first transistor 121. The other tap (not labeled) of the fourth primary winding 162 of the second transformer 16 is connected to the drain electrode of the third transistor 131. Two taps (not labeled) of the second secondary winding 164 are connected to a second load (not shown). The second load may for example be lamps.
When the first square wave signal is a high level and the second square wave signal is a low level, the first transistor 121 and the second transistor 122 are turned on and the third transistor 131 and the fourth transistor 132 are turned off. The first primary winding 151 and the third primary winding 161 cooperatively form a first parallel circuit (not labeled). The first transistor 121 and the second transistor 122 cooperatively form a second parallel circuit (not labeled). A first current path is formed sequentially through the DC input terminal 10, the first parallel circuit, the second parallel circuit, and ground. A first current is formed when the DC power supply provided to the DC input terminal 10 is connected to ground via the first current path. The first current is divided into two parts flowing through the first primary winding 151 and the third primary winding 161 respectively. The first current is also divided into two parts flowing through the first transistor 121 and the second transistor 122 respectively. A direction of the first current flowing through the first winding 151 is from bottom to top, thus a direction of an inducted current flowing through the first winding 151 is from top to bottom. An inducted current correspondingly generated in the first secondary winding 154 and a direction of the inducted current flowing through the first secondary winding 154 is from top to bottom. A direction of the first current flowing through the third winding 161 is from bottom to top, thus a direction of an inducted current flowing through the third winding 161 is from top to bottom. An inducted current correspondingly generated in the second secondary winding 164 and a direction of the inducted current flowing through the second secondary winding 164 is from top to bottom.
When the first square wave signal is a low level and the second square wave signal is a high level, the first transistor 121 and the second transistor 122 are turned off and the third transistor 131 and the fourth transistor 132 are turned on. The second primary winding 152 and the fourth primary winding 162 cooperatively form a third parallel circuit (not labeled). The third transistor 131 and the fourth transistor 132 cooperatively form a fourth parallel circuit (not labeled). A second current path is formed sequentially through the DC input terminal 10, the third parallel circuit, the fourth parallel circuit, and ground. A second current is formed when the DC power supply provided to the DC input terminal 10 is connected to ground via the second current path. The second current is divided into two parts flowing through the second primary winding 152 and the fourth primary winding 162 respectively. The second current is also divided into two parts flowing through the third transistor 131 and the fourth transistor 132 respectively. A direction of the second current flowing through the second primary winding 152 is from top to bottom, thus a direction of an inducted current flowing through the second primary winding 152 is from bottom to top. The inducted current correspondingly generated in the first secondary winding 154 and the direction of the inducted current flowing through the first secondary winding 154 is from bottom to top. A direction of the second current flowing through the fourth primary winding 162 is from top to bottom, thus a direction of an inducted current flowing through the fourth primary winding 162 is from bottom to top. The inducted current correspondingly generated in the second secondary winding 164 and the direction of the inducted current flowing through the second secondary winding 164 is from bottom to top.
Then the inverter circuit 1 repeats the above process. Because the direction of the inducted current flowing through the first secondary winding 154 changes periodically, a first AC voltage is generated between the two taps of the first secondary winding 154. The first AC voltage is used for driving the first load. Because the direction of the inducted current flowing through the second secondary winding 164 changes periodically, a second AC voltage is generated between the two taps of the second secondary winding 164. The second AC voltage is used for driving the second load.
When one of the transistors 121, 122, 131, 132 is turned on, the corresponding transistor 121, 122, 131, 132 has a saturation resistance. Heat is correspondingly generated in the corresponding transistor 121, 122, 131, 132 when the current flows through one of the transistors 121, 122, 131, 132. According to the above description, the first transistor 121 and the second transistor 122 are turned on or turned off simultaneously and the third transistor 131 and the fourth transistor 132 are turned on or turned off simultaneously. When the first transistor 121 and the second transistor 122 are turned on simultaneously, a great deal of heat is generated in the first chip. When the third transistor 131 and the fourth transistor 132 are turned on simultaneously, a great deal of heat is generated in the second chip. When the inverter circuit 1 operates for a long time, the heat generated in the first chip or in the second chip can not dissipate quickly and accumulates in the first chip or in the second chip. Thus, the first switch circuit 12 or the second switch circuit 13 may be impaired or even damaged, the first chip or the second chip are liable to be burned out.
It is desired to provide a new inverter circuit which can overcome the above-described deficiencies.